MAX6968AAE+【PDF 8/13 页】IC LED DRIVER LINEAR 16-SSOP

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8-Port, 5.5V Constant-Current LED Driver

CLK is the serial-clock input, which shifts data at DIN

into the MAX6968 8-bit shift register on its rising edge.

LE

OUT_

LE

OUT_

t LRF

t LRR

LE is the load input of the MAX6968 latch that transfers

data from the MAX6968 8-bit shift register to its 8-bit

latch when LE is high (transparent latch), and latches

the data on the LE ’ s falling edge of LE (Figure 2).

The fourth input provides output-enable control of the

output drivers. OE is high to force outputs OUT0 – OUT7

high impedance, without altering the contents of the

output latches, and low to enable outputs OUT0 – OUT7

to follow the state of the output latches.

OE is independent of the operation of the serial inter-

CLK

OUT_

t CRF

face. Data can be shifted into the serial-interface shift

register and latched, regardless of the state of OE .

DOUT is the serial-data output, which shifts data out

from the MAX6968 ’ s 8-bit shift register on the rising edge

CLK

t CRR

of CLK. Data at DIN is propagated through the shift reg-

ister and appears at DOUT eight clock cycles later.

OUT_

Figure 3. LE and CLK to OUT_ Timing

Table 1. 4-Wire Serial-Interface Truth Table

SERIAL CLOCK

DATA INPUT

SHIFT-REGISTER

CONTENTS

LOAD

INPUT

LATCH CONTENTS

BLANKING

INPUT

OUTPUT CONTENTS

INPUT

DIN

CLK

D 0

D 1

D 2

… D n-1 D n

LE

D 0

D 1

D 2

… D n-1 D n

OE

D 0

D 1

D 2

… D n-1 D n

H

L

X

H

L

R 0

R 1

R 1

R 1

R 2

R 2

R 2

… R n-2 R n-1

… R n-2 R n-1

… R n-1 R n

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

X

X

X

…

X

X

H

R 0

R 1

R 2

— R n-1 R n

—

—

—

—

—

—

—

—

—

P 1

P 2

P 3

… P n-1 P n

L

P 0

P 1

P 2

… P n-1 P n

L

P 0

P 1

P 2

… P n - 1 P n

—

—

—

—

—

— — —

—

X

X

X

…

X X

H

Hi-Z Hi-Z Hi-Z … Hi-Z Hi-Z

L = Low-logic level

H = High-logic level

X = Don’t care

P = Present state

R = Previous state

8

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